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EIA JESD 205:2007

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EIA JESD 205:2007

FBDIMM Specification: DDR2 SDRAM Fully Buffered DIMM (FBDIMM) Design Specification
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This standard defines the electrical and mechanical requirements for 240-pin, PC2-4200/PC2-5300/PC2-6400, 72 bit-wide, Fully Buffered Double Data Rate Synchronous DRAM Dual In-Line Memory Modules (DDR2 SDRAM FB-DIMMs).These SDRAM FB-DIMMs are intended for use as main memory when installed in systems such as servers and workstations. PC2-4200/PC2-5300/PC2-6400 refers to the DIMM naming convention in which PC2-4200/PC2-5300/PC2-6400 indicates a 240-pin DDR2 DIMM running at 266/333/400 MHz DRAM clock speed and offering 4266/5333/6400 MB/s bandwidth.
Patent(s): There are known patent issues that are common to all FBDIMM related specifications. See document for link to FBDIMM Patents.

Author EIA
Editor EIA
Document type Standard
Format File
ICS 35.220.99 : Other data storage devices
Number of pages 129
Year 2007
Document history
Country USA
Keyword EIA 205;205;EIA JESD205
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