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EIA JESD 82-10A:2007
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EIA JESD 82-10A:2007
Definition of the SSTU32866 1.8 V Configurable Registered Buffer with Parity Test for DDR2 RDIMM ApplicationsThis standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTU32866 registered buffer with parity test for DDR2 RDIMM applications. The purpose is to provide a standard for the SSTU32866 (see Note) logic device, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.
| Author | EIA |
|---|---|
| Editor | EIA |
| Document type | Standard |
| Format | File |
| ICS | 35.220.99 : Other data storage devices
|
| Number of pages | 44 |
| Replace | EIA JESD 82-10 (2004-11) |
| Year | 2007 |
| Document history | EIA JESD 82-10A (2007-05) |
| Country | USA |
| Keyword | EIA JESD 82;EIA 82;EIA 82.10A;82;EIA JESD82-10A |
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